nordic,nrf-qspi

Vendor: Nordic Semiconductor

Description

These nodes are “qspi” bus nodes.

Properties defining the interface for the Nordic QSPI peripheral.

The reg property describes two register blocks: one for the memory
corresponding to the QSPI peripheral registers, and another for
the memory mapped XIP area:

    qspi: qspi@2b000 {
            compatible = "nordic,nrf-qspi";
            reg = <0x2b000 0x1000>, <0x10000000 0x10000000>;
            reg-names = "qspi", "qspi_mm";
            ...
    };

Above, the register block with base address 0x2b000 and name
"qspi" are the QSPI peripheral registers. The register block with
base address 0x10000000 and name "qspi_mm" is the XIP area.

Properties

Properties not inherited from the base binding file.

Name

Type

Details

sck-pin

int

 
The SCK pin to use.

For pins P0.0 through P0.31, use the pin number. For example,
to use P0.16 for SCK, set:

    sck-pin = <16>;

For pins P1.0 through P1.31, add 32 to the pin number. For
example, to use P1.2 for SCK, set:

    sck-pin = <34>;  /* 32 + 2 */

This property is required.

io-pins

array

 
Pin numbers associated with IO0 through IO3 signals.

Examples:

    io-pins = <io0-pin io1-pin>; // two pins

    io-pins = <io0-pin io1-pin io2-pin io3-pin>; // four pins

Either two or four pins must be configured using this property
as shown above. The pin numbering scheme is the same as the
sck-pin property's.

This property is required.

csn-pins

array

 
Chip select signal pin number. Exactly one pin should be
given. The pin numbering scheme is the same as the
sck-pin property's.

This property is required.